Title: System and method for electrostatic discharge protection in an electronic circuit
Application Number: 200610081907 Application Date: 2006.05.08
Publication Number: 1897785 Publication Date: 2007.01.17
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: H05F3/00
Applicant(s) Name: Avago Technologies General IP Address:
Inventor(s) Name: Parkhurst Ray Myron Jr.;Ruebusch Ron;Jiaa Chi;Sick
Attorney & Agent: yang kai chen jingjun
Abstract:
    A system and method for implementing an electronic circuit for protecting electronic components from ESD. A PCB or IC may include an electrostatic discharge protection layer having a first and second conductive layer separated by a semi-conductive dielectric layer. Further, the PCB/IC may include a protected node coupled to the first conductive layer and a current-shunt node electrically coupled to the second conductive layer, such that a signal at the protected node that is below a threshold magnitude propagates through the protected node in a normal operating path and a signal at the protected node that exceeds a threshold magnitude is diverted to the semi-conductive dielectric layer to the current-shunt node in a current-shunt path. In this manner, existing layers of a PCB/IC may be used for both ESD protection and other functions, such as ground planes or battery plane by isolating the specific sections of the layer for its intended use.
Time: 12
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