Title: Analog memory and image processing system
Application Number: 98808872 Application Date: 1998.09.25
Publication Number: 1269907 Publication Date: 2000.10.11
Approval Pub. Date: 2004.09.22 Granted Pub. Date: 2004.09.22
International Classifi-cation: G11C27/00;G11C27/02;H04N9/28
Applicant(s) Name: Matsushita Electric Industres Co., Ltd. Address:
Inventor(s) Name: Dosho Shiro;Ozasa Masayuki;Okamoto Tatsuo
Attorney & Agent: wang huimin
Abstract:
    The fixed pattern noise of an analog memory is reduced. The transmission paths of an address selection signal (SL) between an address generating unit (10) and memory devices (21) are so constructed so that the electrical characteristics when the address selection signal (SL) drives the memory devices (21) are nearly uniform to an extent that fixed pattern noise is not included in the output signal of the analog memory. A buffer unit (50) which stores the address selection signal temporarily and outputs it is provided between the address generating unit (10) and the memory devices (21) and the output characteristics of the buffer unit (50) are uniform for the memory devices (21). Further, the wiring between the buffer unit (50) and the memory devices (21) are so constructed that the electrical characteristics of the wiring are nearly uniform. With this construction, the charge feed-through noise of the memory devices (21) can be nearly uniform, and the fixed pattern noise can be suppressed.
Time: 7