Title: Method for realizing STM-256 frame-former
Application Number: 200610161956 Application Date: 2006.12.11
Publication Number: 1980107 Publication Date: 2007.06.13
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: H04J3/16
Applicant(s) Name: Fenghuo Telecommunication Science-Technology Co., Address:
Inventor(s) Name: Lv Jianxin
Attorney & Agent: nijun zhaohui fang
Abstract:
    Characters of the method are that 4 routes STM-64 framer, field programmable gate array FPGA or application specific integrated circuit ASIC chip are adopted to realize STM-256 framer. 4 routes STM-64 framer is utilized to implement multiple connections from 256 VC-4 signals in low speed to STM-64 data stream, and to implement demultiple connections from STM-64 data stream to 256 VC-4 signals in low speed. 4 routes STM-64 framer bears process of STM-256 net load signal, pointer adjustment etc. functions jointly. FPGA chip or ASIC chip accomplishes other functions, which is required by STM-256 framer, but 4 routes STM-64 framer is unable to complete. The invention realizes framing standard STM-256 frame structure, solves issue of integrating chips of STM-256 framer, processes each overhead byte of STM-256 frame smartly according to requirements of users, providing a practical method of resolution for STM-256 framer.
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