Title: Digital-to-analog converter circuit
Application Number: 200610115763 Application Date: 2006.08.16
Publication Number: 1917375 Publication Date: 2007.02.21
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: H03M1/66;G09G3/36;G09G3/20;G02F1/133
Applicant(s) Name: Sanyo Epson Imaging Devices Co. Address:
Inventor(s) Name: Horibata Hiroyuki
Attorney & Agent: cheng wei wang jinyang
Abstract:
    The invention provides a technology whereby digital analog conversion utilizing a capacitance ratio can accurately be executed. The 0-order bit data are supplied to a capacitor 430-0 via a charging control transistor 420-0, first bit data are supplied to a capacitor 430-1 via a charging control transistor 420-1, and second bit data are supplied to a capacitor 430-2 via a charging control transistor 420-2. The transistor size of the charging control transistors 420-0, 420-1, 420-2 is selected to be 1:2:4 in cross reference with the capacitance of the capacitors 430-0, 430-1, 430-2 whose capacitance ratio is selected to be 1:2:4. Thus, the charging applied to the capacitors 430-0, 430-1, 430-2 can be executed under the similar condition.
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