Title: PLL frequency generator
Application Number: 200610170081 Application Date: 2006.12.18
Publication Number: 1983819 Publication Date: 2007.06.20
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: H03L7/08;H03L7/081;H03L7/197;H04B1/40
Applicant(s) Name: ATMEL Germany GmbH Address:
Inventor(s) Name: Beyer Sascha;Jaehne Ralf
Attorney & Agent: zengli
Abstract:
    The invention relates to a PLL frequency generator for generating an output signal with a settable target frequency, comprising a) a voltage-controlled oscillator for generating the output signal depending on a control voltage, b) a switchable frequency divider, which is connected to the voltage-controlled oscillator and is designed to derive a frequency-divided signal whose instantaneous frequency depends on a value of an adjustable divisor, from the output signal c) a switchable delay unit, which is connected to the frequency divider and is designed to generate a delayed signal in that the frequency-divided signal is delayed by delay times that in each case depend on a control word and a control signal, and d) a phase detector, which is connected to the switchable delay unit and is designed to determine the phase difference between a reference signal and the delayed signal and to provide it for the generation of the control voltage. According to the invention, a calibration unit is provided, which is connected to the switchable delay unit and is designed to derive the control signal from the reference signal.
Time: 5
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