Title: Switchable pll circuit
Application Number: 200610144502 Application Date: 2006.11.08
Publication Number: 1964195 Publication Date: 2007.05.16
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: H03L7/08;H03L7/107
Applicant(s) Name: Thomson Licensing Address:
Inventor(s) Name: Drexler Michael;Schaefer Ralf-Detlef
Attorney & Agent: luxiao zhang lixiao shu
Abstract:
    An electronic circuit includes a first and a second PLL stage (PLL1, PLL2) that can be switched in parallel or in series depending on locking of the first one of the PLL circuits to an input signal (IN). When in parallel, only the second PLL circuit (PLL2) is actively supplying a clock signal to the output of the electronic circuit. The first PLL circuit (PLL1) continues trying to lock onto the input signal (IN). A lock detector (LD) monitors the locking status of the first PLL circuit (PLL1) to the input signal (IN) and, upon locking, sets switches (S1, S2) to couple the output of the first PLL circuit (PLL1) to the input of the second PLL circuit (PLL2), and to couple the output of the second PLL circuit (PLL2) to the input of the first PLL circuit (PLL1).
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