| Title: | Lock detecting circuit and method for phase lock loop system | ||
| Application Number: | 200610150025 | Application Date: | 2006.10.24 |
| Publication Number: | 1945977 | Publication Date: | 2007.04.11 |
| Approval Pub. Date: | Granted Pub. Date: | ||
| International Classifi-cation: | H03L7/08;H03L7/00;H03L7/18;G01R31/28 | ||
| Applicant(s) Name: | Weisheng Electronic Co., Ltd. | Address: | |
| Inventor(s) Name: | Huang Junzhe | ||
| Attorney & Agent: | liuxin yu | ||
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Abstract: |
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| This invention relates to a locking detection circuit and a method for phase-locking loop system including a delay unit and an established logic unit, in which, the delay unit inputs phase error signals of the system to generate a current phase error signal and generate at least one delay phase error signal based on it, the established logic unit generates and sets up an un-locked instruction signal based on the current phase error signal and the delayed phase error signal, if said un-locked instruction signal is not established in a specific number of the pulse time, then a loop lock instruction signal is generated, which can adjust the tolerance to the error of static phase difference flexibly. | |||
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| Time: | 16 | ||
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