Title: Circuit arrangement for detection of a locking condition for a phase locked loop, and a method
Application Number: 200610111062 Application Date: 2006.08.18
Publication Number: 1917372 Publication Date: 2007.02.21
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: H03L7/08
Applicant(s) Name: Infineon Technologies AG Address:
Inventor(s) Name: Camuffo Andrea
Attorney & Agent: liu chunyuan wei jun
Abstract:
    A circuit arrangement includes a phase locked loop having a phase detector, wherein the output signal can be measured at the output side of the phase detector and the phase detector is coupled to a charge pump at the output side. Furthermore, the phase locked loop includes an oscillator whose input side is coupled to the charge pump and which is coupled at one output for emission of an oscillator signal to a first input of the phase detector. The circuit arrangement includes a counter whose input side is supplied with an input signal which can be derived from the phase signal and an oscillator signal. The counter emits an output signal from the counter as a function of a value which represents a pulse width of the phase signal. The circuit arrangement further includes a phase-splitting device, the output signal of the counter is guided to the phase-splitting device, and the phase-splitting device is designed to compare the difference value of the pulse width of the continuous pulse with the adjustable limit value D.
Time: 8