| Title: | Clock data recovery having a recovery loop with separate proportional path | ||
| Application Number: | 200610093523 | Application Date: | 2006.06.26 |
| Publication Number: | 1893276 | Publication Date: | 2007.01.10 |
| Approval Pub. Date: | Granted Pub. Date: | ||
| International Classifi-cation: | H03L7/08;H03L7/00 | ||
| Applicant(s) Name: | Altera Corp. | Address: | |
| Inventor(s) Name: | Wang Shoujun;Mei Haitao;Bereza Bill;Kwasniewski Te | ||
| Attorney & Agent: | zhao rongmin xue feng | ||
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Abstract: |
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| A clock data recovery loop that can be used over a wide range of data rates and maintain second-order behavior includes a nonlinear (e.g., Bang-Bang) phase detector, a charge pump, an RC loop filter, and signal generator (e.g., a voltage controlled oscillator (VCO)). At low data rates, the loop may be operated with the charge pump and loop filter with stable second-order behavior, with the resistor R of the loop filter serving as a proportional path. A separate proportional path is also provided that provides phase detector output directly to a control input of the VCO, while the resistor R of the loop filter is also bypassed. As increasing data rates give rise to third-order effects, the separate proportional path may be activated to maintain second-order behavior. | |||
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| Time: | 19 | ||
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