Title: Clock generation circuit and semiconductor device provided therewith
Application Number: 200610087745 Application Date: 2006.05.30
Publication Number: 1874159 Publication Date: 2006.12.06
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: H03L7/10,H03L7/08,H03L7/099
Applicant(s) Name: Semiconductor Energy Lab Address:
Inventor(s) Name:
Attorney & Agent: wang yonggang
Abstract:
     It is an object of the present invention to solve a problem that malfunction of communication is generated by varying a frequency of a clock due to noise from outside in a case where there is no supplied signal in a circuit which performs negative feedback control so that the supplied signal and the feedback signal can maintain a fixed phase relationship between the signals. The present invention provides a configuration including a PLL circuit and an oscillator circuit, where a switch for switching an output between a signal from the PLL circuit and a signal from the oscillator circuit to the signal output portion is provided to switch from a connection to the PLL circuit to a connection to the oscillator circuit in a case where there is no received signal.
Time: 31