Title: N-shape dominoes register with accelerate non-charge path
Application Number: 200610162530 Application Date: 2006.11.27
Publication Number: 1964194 Publication Date: 2007.05.16
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: H03K19/096;G11C11/34
Applicant(s) Name: VIA Technologies, Inc. Address:
Inventor(s) Name: Imran Kuileixi;Raymond A. Bertram
Attorney & Agent: bomai wen huangxiao lin
Abstract:
    A N-shape dominoes register provided with dominoes stage, writing stage, inverter, high voltage maintenance device path, low voltage maintenance device path and output stage. The dominoes stage estimates a logic function based on at least one input data signal and pulse clock signal. The pulse clock signal is behind the symmetric clock signal. when the symmetric clock signal is in low voltage, the dominoes stage precharges the precharging node to high voltage, when the pulse clock signal is in high voltage, opening the estimate window, when dominoes stage is executing the estimation, the precharging node is draw to low voltage, when the dominoes stage can not executing the estimation, the precharging node will kept in high voltage. The output stage provides output signal based on the status of precharging node and the second preliminary output node.
Time: 10
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