Title: Duty-cycle correction circuit and method for differential clocking
Application Number: 200610163928 Application Date: 2006.11.14
Publication Number: 1988384 Publication Date: 2007.06.27
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: H03K5/156
Applicant(s) Name: IBM Address:
Inventor(s) Name: Dwarka Amar;Stevens Joseph M.
Attorney & Agent: yujing lizheng
Abstract:
    A completely differential approach to correcting duty-cycle distortions of a differential clock signal propagating through a differential amplifier. A duty-cycle distortion correction (DCDC) differential amplifier circuit/device is provided with a differential amplifier whose output wires are coupled to a correction circuit. The correction circuit comprises a differential low pass filter and a differential correction amplifier. The differential correction amplifier
Time: 8
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