| Title: | DLL circuit and semiconductor device incorporating the same | ||
| Application Number: | 200610136506 | Application Date: | 2006.10.24 |
| Publication Number: | 1956338 | Publication Date: | 2007.05.02 |
| Approval Pub. Date: | Granted Pub. Date: | ||
| International Classifi-cation: | H03L7/08;H03L7/081;H03K5/13;H03K5/135;H03K19/00;H03K19/0185;G11C7/22;G11C11/406;G11C11/4076 | ||
| Applicant(s) Name: | Elpida Memory Inc. | Address: | |
| Inventor(s) Name: | Fujisawa Hiroki;Takishita Ryuji | ||
| Attorney & Agent: | lujin hua liya | ||
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Abstract: |
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| A delay amount variable circuit ( 8 ) adapted to change a delay amount according to a ZQ calibration result is inserted in a path of a DQ replica system. The delay amount of the path of the DQ replica system is variable and is adjusted so as to make constant a timing skew difference between a DQ buffer system and the DQ replica system. The ZQ calibration result changes depending on variations in temperature, voltage, and manufacture. Therefore, by obtaining the delay amount corresponding to these variations, there are obtained a DLL circuit with high accuracy that can make the skew difference constant, and a semiconductor device incorporating such a DLL circuit. | |||
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| Time: | 4 | ||
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