Title: Semiconductor memory chip with on-die termination function
Application Number: 200610132024 Application Date: 2006.10.19
Publication Number: 1953095 Publication Date: 2007.04.25
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: G11C7/10;G06F13/40;H03K19/0175
Applicant(s) Name: Elpida Memory Inc. Address:
Inventor(s) Name: Hosoe Yuki;Fujisawa Hiroki
Attorney & Agent: sunji quan
Abstract:
    A semiconductor memory chip with an On-Die Termination (ODT) function is disclosed, which comprises a delay locked loop (DLL) circuit, a synchronous circuit, an asynchronous circuit, a select signal generator, and a selector. The DLL circuit is configured to produce a local clock signal in response to a clock signal when a clock enable (CKE) signal is asserted. The DLL circuit has a predetermined boost time. The select signal generator is configured to assert a select signal in consideration of the predetermined boost time. The selector is configured to select an output of the asynchronous circuit until the select signal is asserted but to select another output of the synchronous circuit after the select signal is asserted.
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