| Title: | Delay circuit and image signal prosessing circuit using the same | ||
| Application Number: | 200610159341 | Application Date: | 2006.09.27 |
| Publication Number: | 1953329 | Publication Date: | 2007.04.25 |
| Approval Pub. Date: | Granted Pub. Date: | ||
| International Classifi-cation: | H03K5/13;H01L27/06;H04N9/77 | ||
| Applicant(s) Name: | Sanyo Electric Co. | Address: | |
| Inventor(s) Name: | Serizawa Shunsuke | ||
| Attorney & Agent: | shaoya li lixiao shu | ||
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Abstract: |
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| To provide a delay circuit utilizing a switched-capacitor capable of properly executing its delay processing. The delay circuit includes: a switched-capacitor group including a plurality of switched-capacitor sections each including switching elements and a capacitive element wherein the components of the sections are connected so that an input signal is given to all of the switched-capacitor sections in common and charged to the capacitive elements and the capacitive elements of the switched-capacitor sections are discharged for providing an output of an output signal; and a switching control section that controls ON/OFF of each switching element to sequentially charge the input signal to each capacitive element, discharges the capacitive element having been charged previously in the sequential charging to sequentially output the output signal from each of the switched-capacitor sections and turns off all the switching elements when switching the ON/OFF of each switching element as its control. | |||
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| Time: | 2 | ||
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