Title: Noise filter circuit
Application Number: 200610139837 Application Date: 2006.09.21
Publication Number: 1937406 Publication Date: 2007.03.28
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: H03K5/01;H03K5/1252
Applicant(s) Name: Seiko Instr Inc. Address:
Inventor(s) Name:
Attorney & Agent: liugong chenjing jun
Abstract:
    Provided is a noise filter circuit capable of outputting only a normal signal pulse in synchronization with a clock signal without passing the noise pulse on to a subsequent stage, even if a noise pulse having a width that is larger than a delay time is inputted. The noise filter circuit according to the present invention has a flip-flop additionally provided to a stage subsequent to a noise removing circuit that uses a delay circuit. The delay time of a clock signal inputted to the flip-flop is made different from the delay time of the noise removing circuit to thereby obtain a normal signal pulse to be outputted in synchronization with the clock signal.
Time: 7
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