Title: Calibration circuit and semiconductor device incorporating the same
Application Number: 200610163591 Application Date: 2006.10.17
Publication Number: 1968014 Publication Date: 2007.05.23
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: H03H11/28;H03H11/40;H03K19/00;H03K19/0175;H03K17/687;G11C11/34
Applicant(s) Name: Elpida Memory Inc. Address:
Inventor(s) Name: Fujisawa Hiroki;Yoko Hideyuki
Attorney & Agent: lixiang lan
Abstract:
    The present inventio relates to a calibration circuit. Impedance adjusting transistors are once inactivated on every occasion of changing an impedance adjusting code. After restoring the potential to an initially set potential by once inactivating the impedance adjusting transistors, the state of the transistors is switched according to the impedance adjusting code. By starting the potential from the initially set potential at the time of switching the state of the transistors, no switching noise is generated. Since no switching noise is generated, a comparator always carries out stable comparison and judgment and ensures stable outputs.
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