| Title: | I/Q demodulation circuit | ||
| Application Number: | 200410064234 | Application Date: | 2004.08.18 |
| Publication Number: | 1585262 | Publication Date: | 2005.02.23 |
| Approval Pub. Date: | Granted Pub. Date: | ||
| International Classifi-cation: | H03D7/00,H04L27/22 | ||
| Applicant(s) Name: | Sharp KK | Address: | |
| Inventor(s) Name: | |||
| Attorney & Agent: | bao yudun | ||
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Abstract: |
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| In an I/Q demodulation circuit, an offset amount determined in an offset detection mode is previously stored so that, in a normal reception mode, an offset is corrected for based on the data thus stored. With this configuration, a DC offset and a phase offset can be corrected for without a delay in an I/Q demodulation operation. | |||
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| Time: | 10 | ||
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