Title: Analogue multiplier
Application Number: 200610072733 Application Date: 2006.04.06
Publication Number: 1855695 Publication Date: 2006.11.01
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: H03C1/54,H03D7/14,H03D13/00
Applicant(s) Name: CIT Alcatel Address:
Inventor(s) Name:
Attorney & Agent: zhu haibei
Abstract:
     An analogue multiplier circuit has an input coefficient voltage dependent adjustment of its frequency response. The multiplier contains a multiplier cell (MC) with an RF input (Vin , Vin-) and a coefficient signal input (Vcoeff , Vcoeff-), one or more capacitors (C P 1, C P 2) as peaking capacitors, which one contact connects to the multiplier cell (MC) and the other to a variable resistance (M P 1, M P 2), i.e. a MOS transistor, and a control circuit (CT) for controlling the variable resistance (M P 1, M P 2). The control circuit (CT) is connected to the coefficient signal input (Vcoeff , Vcoeff-) of the multiplier. In the case of a four-quadrant multiplier a rectifier (RT) is connected between the coefficient input (Vcoeff , Vcoeff-) of the multiplier and the control circuit (CT).
Time: 18
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