| Title: | Wide-band modulation PLL, timing error correction system of wide-band modulation PLL, modulation timing error correction method and method for adjusting radio communication apparatus having wide-band | ||
| Application Number: | 200480024134 | Application Date: | 2004.08.04 |
| Publication Number: | 1839540 | Publication Date: | 2006.09.27 |
| Approval Pub. Date: | Granted Pub. Date: | ||
| International Classifi-cation: | H03C3/00,H03L7/18 | ||
| Applicant(s) Name: | Matsushita Electric Ind Co., Ltd. | Address: | |
| Inventor(s) Name: | Yoshikawa Hiroyuki | ||
| Attorney & Agent: | huang xiaolin wang zhisen | ||
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Abstract: |
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| A wide-band modulation PLL, a timing error correction system of the wide-band modulation PLL, a timing error correction method and a method for adjusting a radio communication apparatus having the wide-band modulation PLL exhibiting an improved modulation accuracy. There is provided a PLL portion including a voltage-controlled oscillator (101), a frequency divider (105), a phase comparator (104) and a loop filter (103). Both the frequency division ratio of the frequency divider (105) and the input voltage of the voltage-controlled oscillator (101) are controlled, based on a phase modulation data (121), for adding modulation. An inverter (113) is used to reverse either the phase of the phase modulation data for controlling the frequency division ratio or that of the phase modulation data for controlling the input voltage of the voltage-controlled oscillator (101). A delay control circuit (110) determines a timing error based on a signal (133) obtained by adding together output signals (131,132) of a filter (106) and of a loop filter (103), and uses delay circuits (111,112) to control the timing, thereby correcting the timing error. | |||
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| Time: | 9 | ||
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