| Title: | CMOS digital control LC oscillator on chip | ||
| Application Number: | 200610011678 | Application Date: | 2006.04.14 |
| Publication Number: | 1832333 | Publication Date: | 2006.09.13 |
| Approval Pub. Date: | Granted Pub. Date: | ||
| International Classifi-cation: | H03B5/12,H03L7/099 | ||
| Applicant(s) Name: | Tsinghua Univ. | Address: | 100084 |
| Inventor(s) Name: | Wang Shaohua | ||
| Attorney & Agent: | |||
|
|
|
||
Abstract: |
|||
| This invention relates to a design technology for chips of T-R devices of the wireless communication system characterizing in applying a double-mode step-forward method composed of an technology-voltage-temperature calibration mode and a locking mode to get the assigned output oscillation frequency step by step, in which, in the calibration mode, a MIM switch condenser array controlled by digital signals is applied for frequency rough calibration in a rather wide sphere and in the locking mode, a MOS condenser matrix combining with a modulation mode of high speed digit sigma delta controlled by digital signals is applied to get an accurate output oscillation frequency in a rather wide sphere, especially a coupling mode of an improved MOS variable-capacitance diode is applied to reduce the sensitivity of oscillators to noises, at the same time, a sigma delta modulator of a single-step three-stages feedforward structure is applied to reduce the stray in output signals and a fixed differential capacitor of certain capacitance values is parallel to both ends of the variable-capacitance control circuit to reduce the phase noise of the oscillator and improve the linearity of frequency adjustment. | |||
|
|
|||
| Time: | 12 | ||
<- Previous Patent:Multichannel synchronous sinusoid...
| Next Patent:Applied voltage control circuit f... ->
|
|||