Title: Method of manufacturing semiconductor device having various types of MOSFETS
Application Number: 95118439 Application Date: 1995.09.14
Publication Number: 1130806 Publication Date: 1996.09.11
Approval Pub. Date: 2000.05.17 Granted Pub. Date: 2000.05.17
International Classifi-cation: H01L21/8232;H01L27/105
Applicant(s) Name: NEC Corp. Address:
Inventor(s) Name: Takaharu Kudoh
Attorney & Agent: XIAO JUCHANG ZHANG ZHIXING
Abstract:
    In a method of manufacturing a semiconductor device including a first MOSFET for a non-volatile memory element, a second MOSFET for an input protecting element and a third MOSFET for a logic circuit element, gate structures of the first to third MOSFETs are formed on a p-type substrate. Then, an n-type impurity is injected in the substrate in self-alignment with the gate structure for the third MOSFET with a first dose amount to form source and drain regions for the third MOSFET. An n-type impurity is simultaneously injected in the substrate in self-alignment with the gate structures for the first and second MOSFETs to form source and drain regions for the first and second MOSFETs. An n-type impurity is injected in parts of the source and drain regions of the third MOSFET in self-alignment with the side wall and gate structure with a second dose amount which is higher than the first dose amount.
Time: 12