Title: Method and system for mfg. semiconductor devices
Application Number: 86107683 Application Date: 1986.11.12
Publication Number: 1011140 Publication Date: 1987.05.20
Approval Pub. Date: 1995.08.02 Granted Pub. Date: 1995.08.02
International Classifi-cation: C30B25/00;H01L21/205;H01L31/06
Applicant(s) Name: Semiconductor Power Inst. Co., Ltd. Address:
Inventor(s) Name: Shunpei Yamazaki
Attorney & Agent: LI XIANCHUN
Abstract:
    An improved semiconductor device manufacturing system and method is disclosed in which undesirable sputtering can be averted by virtue of the combination of an ECR system and a CVD system. Prior to the deposition of a semiconductor layer by the ECR/CVD combination, a sub-layer can be formed on a substrate in a reaction chamber and transported to another chamber for deposition to be effected according to the ECR/CVD combination without the substrate being exposed to contact with air, so that a semiconductor junction thus formed has good characteristics.
Time: 6