Title: Defect control technology of silicon wafer for CMOS device
Application Number: 88101555 Application Date: 1988.03.19
Publication Number: 1035917 Publication Date: 1989.09.27
Approval Pub. Date: Granted Pub. Date: 1991.08.14
International Classifi-cation: C30B33/00,H01L21/316,H01L21/324
Applicant(s) Name: Hebei Polytechnical College Address:
Inventor(s) Name: Ren Bingyan, Xu Yuesheng
Attorney & Agent: LI GUORU LI FENG
Abstract:
     A mathos of semiconductor material, is given, especially for CMOS device. Which is for defect control by slice of silicon and utilization technology, first, the process straightens out silicon single crystal, irradiated by neutron, then cuting, grinding, polishing etc. After handled and washed the qualified silicon polishing slice, then derectly heats treatmet firstly of the CMOS integrated circuit. The technology is stahility, good repeatability, economized greatly working hours and energy dissipation. The capacity of the finished production and electric parameter has been raised greatly. Therefore, this technology is widely used in making of CMOS devices.
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