Title: Display
Application Number: 200410048139 Application Date: 2004.06.16
Publication Number: 1577422 Publication Date: 2005.02.09
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: G09G3/20
Applicant(s) Name: Sanyo Electric Co. Address:
Inventor(s) Name:
Attorney & Agent: ge bo cheng wei
Abstract:
     Provided is a display device for suppressing an increase of a consumption current. The display device comprises: a transistor PT1 connected to a negative side potential (HVSS) and turned on by responding to a clock signal; a transistor PT2 connected to a positive side potential (HVDD); a first circuit part 4b1 having a transistor PT3 turning off the transistor PT1 when the transistor PT2 is turned on; a p channel transistor PT4 connected to the negative side potential and turned on by responding to the clock signal; a transistor PT5 connected to the positive side potential; and a second circuit part 4c1 having a transistor PT6 turning off when the transistor PT3 is turned on and turning off the transistor PT4 when the transistor PT5 is turned on.
Time: 7
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