Title: Microprocessor apparatus and method for optimizing block cipher cryptographic functions
Application Number: 200510055010 Application Date: 2005.03.14
Publication Number: 1661958 Publication Date: 2005.08.31
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: H04L9/06,G09C1/00
Applicant(s) Name: VIA Tech Inc. Address:
Inventor(s) Name: Henry G. Glenn, Crispin Thomas A.
Attorney & Agent: tang baobeng
Abstract:
     The present invention provides an apparatus and method for performing cryptographic operations on a plurality of input data blocks within a processor. In one embodiment, an apparatus for performing cryptographic operations is provided. The apparatus includes a cryptographic instruction and translation logic. The cryptographic instruction is received by a computing device as part of an instruction flow. The cryptographic instruction prescribes one of the cryptographic operations. The translation logic translates the cryptographic instruction into micro instructions. The micro instructions are ordered to direct the computing device to load a second input text block and to execute the one of the cryptographic operations on the second input text block prior to directing the computing device to store an output text block corresponding to a first input text block. Consequently, the output text block is stored during execution of the one of the cryptographic operations on the second input text block.
Time: 8
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