Title: Banknote receiver
Application Number: 200610035595 Application Date: 2006.05.25
Publication Number: 1851758 Publication Date: 2006.10.25
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: G07D7/06,G07D11/00,G07D13/00
Applicant(s) Name: He Yubin Address: 528300
Inventor(s) Name:
Attorney & Agent: shi zezhi
Abstract:
     A bank note acceptor includes top level central processing control circuit and lower layer central processing control circuit constituting symmetric detective conjugate system; top level transducer reflecting, penetrating and absorbing detection the double face of bank note, the obtained signal passing top level impedance matching circuit sent to top level central processing control circuit, top level central processing control circuit output sent to top level light source through top level luminous power control circuit. Lower layer transducer reflects, penetrates and absorbs detection to double face of bank note, the obtained signal passing lower layer impedance matching circuit sent to lower layer central processing control circuit, lower layer control circuit output sent to lower layer light source through lower layer luminous power control circuit. Top level central processing control circuit and Lower layer central processing control circuit are connected with speed sensing circuit for generating synchronous signal; top level central processing control circuit connected with memory circuit for storing bank note data. The present invention adopts two independent working CPU located on top and Lower layer, constituting symmetric detective conjugate system, capable of proceeding double wavelength synchronous detection and four wavelength synchronous detection to realize bank note denomination and forgery prevention identification.
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