Title: Analog multiply circuit and gain variable amplify circuit
Application Number: 01119541 Application Date: 2001.05.29
Publication Number: 1326164 Publication Date: 2001.12.12
Approval Pub. Date: 2005.05.04 Granted Pub. Date: 2005.05.04
International Classifi-cation: G06G7/163
Applicant(s) Name: Matsushita Electric Ind. Co., Ltd. Address:
Inventor(s) Name: Amano Yasuhiro
Attorney & Agent: ma ying
Abstract:
    A first analog differential signal V1p and a first analog differential signal V1n are applied to the respectively commonly-connected bases of two sets of differential pairs which are constructed of transistors Q1 to Q4. Collectors of Q11 and Q12 are connected to the respective commonly-connected emitters of these differential pairs. Parallel resonant circuits are connected to the respective emitters of Q11 and Q12, and the emitter-to-emitter path is connected by R15. Input circuits 101 and 102 are connected to the respective bases of Q11 and Q12. A second analog differential signal V2p and a second analog differential signal V2n are inputted to these input circuits 101 and 102. A total number of longitudinally-stacked stages of the transistors can be made of two stages, and also the analog multiplying circuit can be operated under low power supply voltage.
Time: 12