Title: Low voltage difference linear voltage regulator with high ripple suppression ratio of power supply
Application Number: 200610026442 Application Date: 2006.05.11
Publication Number: 1873576 Publication Date: 2006.12.06
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: G05F1/56
Applicant(s) Name: Huarun Xiwei Tech (Shanghai) Co., Ltd. Address: 200233
Inventor(s) Name: Wang Lei
Attorney & Agent: chen liang
Abstract:
     The invention discloses a low voltage and difference linear regulator circuit with high restraining ratio of power ripple. The circuit includes the error amplifier, the drive amortizing grade and access PMOS transistor. The circuit includes a low plus grade. The input end of the circuit is jointed with the output end of the error amplifier. The output of the circuit is jointed with the output end of the drive amortizing grade to increase the restraining ratio of power ripple. The PMOS transistor in the invention can generate steady output voltage at the station of high output current and almost zero current. The inside low plus grade sands the power ripple non-anamorphic to the input of the drive amortizing grade. The drive amortized grade sands the power wave non-anamorphic to the grid of the access PMOS tube. It ensures the grid power voltage of the access PMOS tube would not change because the being of the power ripple. This improves the ability of anti-power noise of the circuit.
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