Title: Reference voltage generating circuit
Application Number: 200610153133 Application Date: 2006.12.08
Publication Number: 1979369 Publication Date: 2007.06.13
Approval Pub. Date: Granted Pub. Date:
International Classifi-cation: G05F3/30
Applicant(s) Name: Elpida Memory Inc. Address:
Inventor(s) Name: Fujisawa Hiroki;Nakamura Masayuki;Tanaka Hitoshi
Attorney & Agent: lujin hua xieli na
Abstract:
    Disclosed is a reference voltage generating circuit which includes resistors R 0 , R 0 and R 3 , a differential amplifier A 1 and transistors Q 1 , Q 2 and Q 3 . The collectors of the transistors Q 1 and Q 2 are connected to differential input terminals of the differential amplifier, while one ends of the R 0 , R 0 and R 3 are connected in common to an output of the differential amplifier A 1 . The other ends of the two resistors R 0 are connected in common to the collectors of the transistors Q 1 and Q 2 , while the other end of the resistor R 1 is connected to the collector and the base of the transistor Q 3 , which transistor Q 3 has the base connected to the bases of the transistors Q 1 and Q 2 . The emitter size ratio of the transistors Q 1 and Q 2 is set to 1:N. A current of a value approximately equal to that of the collector current of the transistor Q 1 or Q 2 and a current with a positive temperature coefficient larger than the first-stated current are caused to flow through the resistor R 1 . The reference voltage generating circuit outputs a voltage corresponding to the sum of a voltage generated across both ends of the resistor R 1 and a base-to-emitter voltage VBE3 of the transistor Q 3.
Time: 8
<- Previous Patent:Switching regulator   |  Next Patent:AC voltage stabilizer ->