| Title: | Semiconductor wafer processing system with vertically-stacked process chambers and single-axis dual-wafer transfer system | ||
| Application Number: | 00806652 | Application Date: | 2000.03.21 |
| Publication Number: | 1348552 | Publication Date: | 2002.05.08 |
| Approval Pub. Date: | Granted Pub. Date: | ||
| International Classifi-cation: | G03D5/00;H01L21/31 | ||
| Applicant(s) Name: | Silicon Valley Group, Thermal Systems LLC | Address: | |
| Inventor(s) Name: | Richard.N. Savage;Frank.S. Menagh;Helder.R. Carval | ||
| Attorney & Agent: | luo echuan | ||
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Abstract: |
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| A semiconductor wafer processing system including a multi-chamber module having vertically-stacked semiconductor wafer process chambers and a loadlock chamber dedicated to each semiconductor wafer process chamber. Each process chamber includes a chuck for holding a wafer during wafer processing. The multi-chamber modules may be oriented in a linear array. The system further includes an apparatus having a dual-wafer single-axis transfer arm including a monolithic arm pivotally mounted within said loadlock chamber about a single pivot axis. The apparatus is adapted to carry two wafers, one unprocessed and one processed, simultaneously between the loadlock chamber and the process chamber. A method utilizing the disclosed system is also provided. | |||
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| Time: | 6 | ||
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