| Title: | Semiconductor device having contact check circuit | ||
| Application Number: | 98104093 | Application Date: | 1998.02.04 |
| Publication Number: | 1205522 | Publication Date: | 1999.01.20 |
| Approval Pub. Date: | 2004.06.09 | Granted Pub. Date: | 2004.06.09 |
| International Classifi-cation: | G01R31/28 | ||
| Applicant(s) Name: | Mitsubishi Denki K. K. | Address: | |
| Inventor(s) Name: | Susumu Tanida | ||
| Attorney & Agent: | jiang fuhou | ||
|
|
|
||
Abstract: |
|||
| A contact check circuit of a semiconductor device includes N-channel MOS transistors connected in series between pads located at opposing ends, with their gates respectively connected to intermediate pads. At the contact check, conduction between opposing pads is checked, applying a high level to probes corresponding to the pads. Thus contact between the pads and probes of a semiconductor testing apparatus can be checked at once. | |||
|
|
|||
| Time: | 23 | ||
<- Previous Patent:Worldwide marketing logistics net...
| Next Patent:IC tester using optical driving t... ->
|
|||