Match Application Number Document Title
1 200610170081 PLL frequency generator
The invention relates to a PLL frequency generator for generating an output signal with a settable target frequency, comprising a) a voltage-controlled oscillator for generating the outpu...
2 200610168302 Loop low pass filter
A filter of loop low-pass type consists of resistance, the first thin gate depletion-mode NMOS tube, the second thin gate depletion-mode NMOS tube and level shifter. It is featured as con...
3 200610147649 Frequency tracking power frequency digital filtering method
A method for filtering power frequency digit by frequency-tracking includes switching power frequency reference signal into signal input end of phase locked loop, outputting eight frequen...
4 200610165666 Electric charge pump, phase-locking loop, method of regulating controlling curr...
The present invention provides a charge pump, a phase lock loop circuit, a method for adjusting a current in the charge pump and a method for generating outputting signals, in which the p...
5 200610169360 Frequency tuning method for phase lock loop
A method for frequency tuning in a phase lock loop suitable for use in multi-band VCO wireless systems having very limited initial frequency lock times is disclosed. A predetermined subse...
6 200610169013 PLL frequency generator
The invention relates to a PLL frequency generator for generating an output signal with a settable target frequency, comprising a) a voltage-controlled oscillator for generating the outpu...
7 200610164076 Synthesizer module
A synthesizer module for connecting a filter (4) for removing a reference signal between a grounding pattern region (7) of a PLL circuit and a wide-field grounding pattern region (11) to ...
8 200610168866 Device and method of adjusting damping coefficient in phase locked loop
A damping coefficient variation mechanism for a PLL including a bias controller, a gain control circuit, and an oscillator circuit. The PLL receives an input clock signal and provides an ...
9 200610171948 Charge pump circuit and its method
A charge pump circuit and method thereof are provided. The example charge pump may include a first switch transistor supplying a first current to an output node in response to a first sig...
10 200610162535 Phase frequence detector capable of reducing dead zone range
The present invention provides a phase frequency detector which generates corresponding output signals at the first and the second output ends according to the input signals received at t...
11 200610146892 Programmable transceivers capable of operating over wide frequency ranges
A field-programmable gate array (FPGA) may include data receiver and/or transmitter circuitry that is adapted to receive and/or transmit data at any frequency(ies) or data rate(s) in a wi...
12 200610063569 Apparatus and method of auto-regulating testing clock frequency
The invention relate to the device automatically adjusted boundary scan to test clock rate. It includes scanning unit used to scan chain circuit and adjust whether TCK frequency is relia...
13 200610097589 High frequency sampling circuit
The invention relates to a high-frequency sampling circuit, wherein it comprises differential amplifier, comparing amplifier, two Schmitt triggers and two diodes; two differential outputs...
14 200610144677 Circuit, IC chip and method of detecting edge triggering false impulse in noise...
A phase- or frequency-locked loop circuit (200) that generates an accurate output signal (ACC_SYN_OUT) even in the presence of edge-triggering-type glitches ( 148, 304 A, 304 B) in the in...
15 200610136695 PLL transient response control system and communication system
The present invention includes two lines of PLL circuits. The first PLL circuit 31 includes a first voltage-controlled oscillator 34 that increases in oscillation frequency as a control v...
16 200610144470 Oscillator and data processing equipment using the same and voltage control osc...
An LC resonant circuit of an oscillator includes a parallel circuit of an inductor, a first fine adjustable capacitor and a first capacitor bank, and a series circuit of a second fine adj...
17 200610144502 Switchable pll circuit
An electronic circuit includes a first and a second PLL stage (PLL1, PLL2) that can be switched in parallel or in series depending on locking of the first one of the PLL circuits to an in...
18 200610137765 High speed signal phase control method and device
The phase control device, i.e. phase controller (PC) consists of thermo-transducer, CPU and voltage control delayer. Via the operation instruction from the exterior main control system, t...
19 200610143203 Duty radio detecting circuit, dll circuit with the same and semiconductor device
Accurate duty detection is enabled by performing duty detection once every two cycles while delaying detection of one clock logic level by a half cycle, and presetting the potential of a ...
20 200610136693 PLL
A phase-locked loop with reduced settling time, in particular in or for a transceiver circuit of a tire pressure monitoring system, is disclosed, The phase-locked loop includes, sequentia...
21 200610142811 Duty cycle correction circuit, clock pulse generation circuits, and related app...
The invention provides a semiconductor device and method of generating clock signals where a phase lock loop (PLL), or a delay lock loop (DLL), comprises a duty cycle correction circuit (...
22 200610114086 CMOS of chip digital controlled complementary type LC oscillator in low noise
The special feature lay on that: adopts the novel digital control mutual complementary type MOS capacity-variable diode to build digital control oscillator, therefore reduces the phase no...
23 200610137553 Delay-locked loop system and interrelated method
The invention discloses a delay-locked loop system and an interrelated method, the method is used for generating a recovered clock according to an input signal and a reference clock. The ...
24 200610137500 Power supply voltage control apparatus
A power supply voltage control apparatus capable of freely setting a clock period setting margin according to a system clock frequency, and capable of converging power supply voltage to m...
25 200610163567 Clock generation circuit and method of generating clock signals
Clock generation circuit and method of generating clock signals are disclosed. The clock generation circuit includes an inverter directly receiving an external clock signal and outputting...
26 200610123076 Integrated phase lock frequency synthesizer
This invention discloses an integrated phase-lock ring frequency synthesizer including a reference frequency generation module, a phase discriminating module, a charge pump module, a volt...
27 200610150025 Lock detecting circuit and method for phase lock loop system
This invention relates to a locking detection circuit and a method for phase-locking loop system including a delay unit and an established logic unit, in which, the delay unit inputs phas...
28 200610136506 DLL circuit and semiconductor device incorporating the same
A delay amount variable circuit ( 8 ) adapted to change a delay amount according to a ZQ calibration result is inserted in a path of a DQ replica system. The delay amount of the path of t...
29 200610136113 Oscillator circuit and infrared receiver
An oscillator circuit includes: a charge and discharge circuit for charging or discharging a capacitor; and a signal generating circuit for generating a signal in which an interval time p...
30 200610136341 Non-integer frequency division synthesizer and correlated method thereof
A frequency synthesizer includes: a phase detector, a loop filter, a controllable oscillator, a frequency divider, and a sigma-delta modulator for providing the division factor according ...
31 200610096902 Apparatus for measuring entrance phase position of Tokamak low-noise-wave anten...
The invention discloses a phase-measuring device and identification method to entrance Tokamak low clutter antenna phase. That is to connect a dual directional coupler respectively at the...
32 200610063022 Clock synchronizing method between base stations
This invention discloses a clock synchronization method among base stations, which sets a time server in the entire network to broadcast primary time information to all base stations in t...
33 200610142085 Method of manufacturing crystal oscillator and the crystal oscillator manufactu...
The method of manufacturing a crystal oscillator that is compensated for temperature with low-cost, and a crystal oscillator that is compensated for temperature by the method is disclosed...
34 200610141079 Oscillation control device and synchronization system
An oscillation control device for controlling a frequency of an oscillator located at the remote site from a standard laboratory having a standard oscillator. The control device includes:...
35 200610141523 Apparatus and method for using fuse to store PLL configuration data
An apparatus and method for using electrical fuses (eFuses) to store phase-locked loop (PLL) configuration data are provided. With the apparatus and method, a portion of the eFuses presen...
36 200610141489 Delay locked loop
A delayed locked loop, capable of a duty cycle compensation, resets if a phase difference between outputs from delay blocks in the delay locked loop is over a predetermined amount after a...
37 200610159338 Information handling system capable of detecting frequency lock and method ther...
An information handling system including a frequency synthesizer lock detection system is disclosed that distributes a frequency synthesizer output signal across a distribution network to...
38 200610142156 Voltage control oscillator and voltage control oscillator unit
A voltage control oscillator that is provided to suitably receive digital broadcasting and is produced at low costs includes: a resonance circuit that includes variable capacitors, each h...
39 200610131733 Apparatus and method for controlling on die termination
The present invention provides an apparatus for controlling an on die termination (ODT) includes a counting unit for receiving an external clock signal and a delay locked loop (DLL) clock...
40 200610124559 Single beam magneto-optic well system
The disclosed single-beam magnetic trap system comprises: four same full-refraction lens connected with the confinement laser beam/beam-splitting, a couple of inverse Helmholtz coils link...
41 200610139527 Direct digital synthesizer, direct digital synthesizer for transmission and det...
In order to output amplitude data with the clock frequency higher than the clock frequency of phase data, the direct digital synthesizer for transmission and detection comprises: a transm...
42 200610159543 Compensated-clock generating circuit and usb device having same
A compensated-clock generating circuit that complies with USB specifications includes an oscillating circuit that generates clock pulses; a counting circuit that counts the number of cloc...
43 200610037507 Method and circuit of recovering timing data
The invention comprises: a signal detecting module, a logic control module, a sample clock phase adjusting module and a data pre-sampling module. The signal detecting module is used to de...
44 200610126948 Phase locked loop with temperature compensation
An integrated circuit (IC) package comprises an IC wafer and an annealed glass paste (AGP) layer that is arranged adjacent to the IC wafer. A molding material encapsulates at least part o...
45 200610127218 Time-vein signal regulating method and device
The invention relates to a clock impulse signal adjusting method and relative device, which can based on input data frequency adjust the frequency of clock impulse signal. Wherein, the in...
46 200610121614 Pulse generator, disk writer and tuner
A pulse generator is provided for generating pulses with a selectable variable width and/or delay. The pulse generator comprises an oscillator and a selecting arrangement for selecting ho...
47 200610062340 A delay phase-lock loop, voltage-controlled delay line and delay cell
The invention relates to a delay phase-lock ring, voltage-control delay line and delay unit, wherein it comprises bias generator and voltage-control delay line; the bias generator generat...
48 200610030156 Adaptive process and temperature compensated high frequency ring-oscillating ph...
It is a high frequency loop oscillation type phase locked loop circuit with self-accommodation frequency compensation. It consists of a multichannel loop type voltage-control oscillator w...
49 200610163938 Semiconductor device, spread spectrum clock generator and method thereof
A semiconductor device, a spread spectrum clock generator and method thereof are provided. The example semiconductor device may include a frequency dividing unit receiving an output signa...
50 200610111062 Circuit arrangement for detection of a locking condition for a phase locked loo...
A circuit arrangement includes a phase locked loop having a phase detector, wherein the output signal can be measured at the output side of the phase detector and the phase detector is co...
51 200610108732 Delay locked loop circuit
A DLL of a memory device having a normal mode and a power down mode includes a clock buffer for buffering an external clock signal to output an internal clock signal. A power down mode co...
52 200610108799 Delay cell of voltage controlled delay line using digital and analog control sc...
Provided is an analog/digital control delay locked loop (DLL). The DLL includes: a phase detector for detecting a phase difference between an input clock signal and a feedback signal to p...
53 200610146391 System and method for signal filtering in a phase-locked loop system
A system and method for modulating a phase component of an electromagnetic signal includes a phase/frequency detector (290) having first and second inputs and an output. The first phase/f...
54 200610109198 Apparatus and method for clock data recovery with low lock frequency
For clock and data recovery (CDR), a clock processor generates sampling clock signals from original phase-shifted clock signals each having a frequency that 1/8 of a frequency of an input...
55 200610109199 Clock pulse generating circuit
The invention is to obtain a clock generation circuit having a PLL circuit and capable of evading the generation of abnormality at the switching of clocks independently of the signal leve...
56 200610128513 Lock detector and delay-locked loop having the same
A lock detector of a delay-locked loop (DLL) includes a lock detection unit and a bias unit. The lock detection unit generates a charge control signal based on a reference current receive...
57 200610099598 All digital implementation of clock spectrum spreading (dither) for low power/d...
The invention discloses a total digital implement for low-power/pipe core area clock spectrum spreading. A digital circuit configured to spread a clock train spectrum includes a clock con...
58 200610029645 Radio frequency double-channel voltage controlled oscillator based on central t...
This invention relates to a RF double-band voltage-controlled oscillator based on a central tapping inductor switch, in which, IEEE802.11 is one of the radio LAN protocols widely used in ...
59 200610126365 Wide range and dynamically reconfigurable clock data recovery architecture
Wide range and dynamically reprogrammable CDR architecture recovers an embedded clock signal from serial input data with a wide range of operating frequencies. In order to support a wide ...
60 200610103495 Real-time clock device and current time compensating method
Disclosed is a real-time clock device and current time compensating method for automatically compensating the time error belonging to the timing unit. The real-time clock device contains:...
61 200610103689 Phase locked loop fast lock method
The present invention is a method to rapidly lock a type II phase locked loop (PLL) after a frequency jump without degrading the output signal much. The method to decrease the settling ti...
62 200610107741 Phase locked loop having cycle slip detector capable of compensating for errors...
A phase locked loop capable of compensating for errors caused by cycle slips. The phase locked loop includes a phase detection unit for generating a phase error signal; a loop filter for ...
63 200610088874 Clock generating device based on lock-phase ring
This invention discloses a clock generation device based on a phase-locking ring including a crystal oscillator, a first phase-lock ring and a digital clock frequency divider characterizi...
64 200610103615 Automatic frequency control loop circuit
Provided is a frequency control loop circuit changing division ratios of a frequency synthesizer to oscillate frequencies in a broadband with high precision. The circuit comprises a clock...
65 200610105812 Voltage-controlled oscillator circuit and pll circuit
A differential type voltage-controlled oscillator circuit including: a plurality of VCO cells each having one pair of switching elements, the switching elements having one terminal side c...
66 200610106292 Auto-gain controlled digital phase-locked loop and method thereof
The present invention relates to an auto-gain controlled digital phase-locked loop system and a method thereof. The system includes: a phase detector for genetating a phase difference sig...
67 200610126387 Charge pump apparatus, system and method
Apparatus, system, and method including a single common node bias voltage; at least a first current path to drive a bias current based on the single common node bias voltage; at least a f...
68 200610103128 Test circuit, delay circuit, clock generating circuit, and image sensor
A test circuit comprises a delay circuit 11 with controllable delay, a phase comparator circuit 12 for comparing the phases between the clock signal S0 and a delay clock signal S1 delayed...
69 200610101717 Clock generator, radio receiver using the same, function system, and sensing sy...
A clock generator having phase locked loops to receive reference signals from a shared reference signal source and generate clock signals differing in frequency, respectively, includes a ...
70 200610088318 Data differentiating circuit for clock data recovery circuit and its differenti...
The invention relates to a data identify method of data identify circuit in clock data recover time, which can be used in the clock data recover circuit of fiber communication network and...
71 200610100532 Phase detecting circuit having adjustable gain curve and method thereof
A phase detecting circuit having an adjustable gain curve includes a plurality of phase detectors and a logic circuit. The phase detectors detect phase differences between a data signal a...
72 200610101156 Frequency synthesizer
A frequency synthesizer in an ultra wide band (UWB) wireless communication system which transmits and receives data through multiband includes a frequency generation means which generates...
73 200610093523 Clock data recovery having a recovery loop with separate proportional path
A clock data recovery loop that can be used over a wide range of data rates and maintain second-order behavior includes a nonlinear (e.g., Bang-Bang) phase detector, a charge pump, an RC ...
74 200610171930 Sigma-delta-converter and use thereof
The invention provides a sigma-delta converter suitable for high clock frequency and rapid siganal processing. A sigma-delta converter has a signal input for receiving a data word. A cloc...
75 200610110893 Method and device for stabilizing a transfer function of a digital phase locked...
In a method for stabilizing a transfer function of a digital phase locked loop a random digital signal is fed into the phase locked loop. The phase locked loop comprises the transfer func...
76 200610089390 Digital phase-locking loop for resistance vibration-pickup type silicon micro-m...
The invention discloses a digital lock-phased loop of resistance vibrating-pick typed silicon microprocessor mechanic resonant sensor, which comprises the following parts: low-pass filte...
77 200610089391 Digital phase-locked closed-loop of resistance vibration pickup type silicon mi...
The invention discloses a digital phase-locked closed-loop of resistance pick-up type silicon micro mechanical resonant transducer, which comprises the following parts: low-pass filter, ...
78 200610090427 Composition purpose signal generating apparatus, IC chip, GPS receiver, and cel...
The invention provides a synthetic signal generating device, or the like that prevents a reception signal from being affected by interference waves for obtaining high sensitivity without ...
79 200610091786 Phase locked loop damping coefficient correction apparatus and method
A damping coefficient correction mechanism for a PLL circuit including a gain controlled oscillator circuit, a damping controller, and gain compensation logic. The PLL circuit provides a...
80 200610094589 Phase locked loop circuit and method of locking a phase
A phase locked loop circuit and method of locking a phase. The phased locked loop circuit may include a phase detector receiving an external clock signal and a feedback clock signal and ...
81 200610043016 Multi-phase orthogonal clock generating circuit based on phase interpolation se...
The invention comprises: 8 phase interpolating and selecting circuits and one phase selecting circuit. The phase interpolating and selecting circuits divide the reference clock signals wi...
82 200610027203 Automatic regulating method and circuit for phase locking loop frequency synthe...
This invention relates to an automatic adjusting method and a realization circuit for the switch of a phase-locking loop frequency synthesizer switch capacitance, which changes the LC re...
83 200610012108 Phase-lock closed loop system of resistance vibration pickup type silicon micro...
This invention relates to a phase-locking close-loop system of vibration pick up silicon micro-mechanical resonance sensors, in which, a sensitive structure vibration pick up resistor, a...
84 200610094516 System and method for optimizing phase locked loop damping coefficient
An adjustable oscillator for dynamically optimizing a damping coefficient of a PLL circuit including a gain controlled oscillator circuit and a damping controller. The PLL circuit provid...
85 200610078434 Frequency divider and phase-locked loop using same
The invention refers to a frequency divider that can be digitized operated and satisfies the Zigbee standard, as well as phase-locked loop which using this frequency divider. The frequen...
86 200610087745 Clock generation circuit and semiconductor device provided therewith
It is an object of the present invention to solve a problem that malfunction of communication is generated by varying a frequency of a clock due to noise from outside in a case where the...
87 200610081059 Phase locked loop, signal generating apparatus and synchronization method
A phase locked loop for outputting a high frequency signal by executing synchronization and frequency conversion based on an input signal includes a control-type oscillator, and a phase ...
88 200610099877 Frequency control device and information reproduction apparatus
A frequency control device capable of detecting a frame sync pattern and generating a frequency information accurately even if a reproduction signal is not zero-crossed, and an informati...
89 200610079803 Phase and frequency detection circuits
In one embodiment, a phase-locked loop system in a receiver samples received incoming data using a first clock and a second clock that have the same frequency but are out of phase with ea...
90 200610144433 Generation of low-frequency clock
A first and a second resonator are fabricated monolithically adjacent to one another. The first resonator is the reference resonator. The resonant frequency of the second resonator is off...
91 200610075131 Phase-locked loop using continuously auto-tuned inductor-capacitor voltage cont...
Improved voltage controlled oscillator circuits and phase-locked loop circuits are disclosed. For example, a voltage controlled oscillator circuit comprises a first linear amplifier, the...
92 200610077168 Semiconductor integrated circuit and radio communication apparatus for communic...
A total power consumption of a radio communication apparatus is reduced, the radio communication apparatus including a semiconductor integrated circuit (high-frequency IC) which has a cl...
93 200610072347 Logic level switch circuit and phase synchronous circuit using same
A logical level converter generates an output signal by which succeeding logical circuit accurately operates even if there is a threshold fluctuation factor. In the logical level convert...
94 200680000421 Two-point modulation type phase modulating apparatus, polar modulation transmit...
There provides a two-point modulation phase modulation apparatus capable of obtaining an RF phase modulation signal of superior modulation precision with low power consumption and a simpl...
95 200610073501 General clock synchronizer and general clock synchronism method
The present invention is one clock synchronizer for transmitting pulse signal from the first circuit block operating in the first clock signal to the second circuit block operating in th...
96 200610042679 Multiple carrier-frequency digital frequency source
This invention discloses a multi-carrier frequency digital frequency source including a computer interface circuit, a clock and drive circuit, a field programmable gate array FPGA unit, ...
97 200610011678 CMOS digital control LC oscillator on chip
This invention relates to a design technology for chips of T-R devices of the wireless communication system characterizing in applying a double-mode step-forward method composed of an te...
98 200610066337 Voltage hold circuit and clock synchronization circuit
The object of this invention is to provide a voltage-holding circuit for holding a voltage of an input signal, while its cost is reduced, and to provide a clock synchronization circuit h...
99 200610075343 Method and system for a lock detector for a phase-locked loop
A lock detector receives a feedback signal from a phase-locked loop and a reference signal. The lock detector includes a first generator for receiving the reference and feedback signals,...
100 200610074713 Duty detection circuit and method for controlling the same
A duty detection circuit is provided with a main circuit unit that includes at least a first capacitor that is discharged during the time period in which the clock signal is at a high le...
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